2001 International Cadence User Group Conference

Schedule - Sunday, December 2, 2001

Go To: Sunday / Monday / Tuesday / Wednesday / Thursday

Tutorials

8:00 - 12:00 SIG:   Custom IC Synthesis Place & Route Custom IC Custom IC PCB PCB   PCell & Advanced Skill  Timing Closure Flow and Methodologies Using Cadence PKS  AMS Behavioral Modeling   Skill in Allegro Design Reuse  (hands on)   12:00 - 1:00 Lunch on Your Own 1:00 - 4:00 SIG:   Custom IC Synthesis Place & Route   Custom IC PCB PCB      Best Practices with BuildGates, Datapath Synthesis, and Low-Power-Synthesis    Assura Physical Verification Deck Development for DRC/LVS/RCX  SPECCTRAQuest and Constraint Manager for Allegro Designers Virtuoso Custom Router/Designer  (hands on)   5:30 - 9:00 ICU Registration and Reception

Go To: Sunday / Monday / Tuesday / Wednesday / Thursday