IC SIG - 2001 Top Ten Issues

1. The GDM interface is the wrong architecture for fast, effective data management. Cadence needs to change the way that DM functionality is handled on a global basis.
   
   The correct solution would be to map the Skill trigger model to provide low level hooks for DM integration to the C level through a common shared library, allowing high performance, customisable DM with an error recovery and communication channel.
   
   Customer Champion: Shiv Sikand, Velio Communications Inc.
   sikand@velio.com
   Cadence Champion:



2. Increase number of layers from 127
   Customer Champion: Rick Ross, Motorola
   
   Cadence Champion:



3. Foreground capability for Assura
   Customer Champion: Menno Clerk, Philips
   menno.clerk@philips.com
   
   Cadence Champion:



4. Placement for standard cells VCR, forward compatibility
   Customer Champion: Emmanuelle Laprise, Photonic Systems Group, McGill University, Canada
   emmanue@photonics.ece.mcgill.ca
   
   Cadence Champion:



5. Redraw performance in Virtuoso 4.4.x
   Customer Champion: Sue Strang
   sstrang@us.ibm.com
   
   Cadence Champion:



6. Support X-Emmulation
   Customer Champion: Haibo Zhu, IBM
   hzhu@us.ibm.com
   
   Cadence Champion:



7. VXL performance, rebinding of electrical to physical design in update mode is slow
   Customer Champion: Emmanuelle Laprise, Photonic Systems Group, McGill University, Canada
   emmanue@photonics.ece.mcgill.ca
   
   Cadence Champion:



8. Inherited Connections not supported outside framework (Verilog)
   Customer Champion: Menno Clerk, Philips
   menno.clerk@philips.com
   
   Cadence Champion:



9. Compaction for analog design
   Customer Champion: Alain Rambert, Philips
   Alain.Rambert@Philips.com
   
   Cadence Champion:



10. Specctre optimized must partition in order to support extraction, number of nets/devices
    Customer Champion: Cliff Wiener, National Semiconductor
    clifford.wiener@nsc.com
    
    Cadence Champion:

Last modified: Mon Dec 18 08:06:46 EST 2000